nSys Design Systems Pvt. Ltd. ( www.nsysinc.com )
http://www.ChetanaS.org
nSys Verification Suite family is the world's largest portfolio of Verification IPs. Global leaders in Semiconductor, System Houses, Networking & Storage industries use our products to accelerate their ASIC/SoC designs. We have offices in Delhi & CA

Fresh Electronics Engineer from DCE/NSIT/NITs only

Job Description :
- Fresh Electronics Engineers will be provided on-the-job training for one year & will be part of the team responsible for enhancing the world's largest portfolio of Verification IPs.

Desired Skills :
- Students from good engineering colleges
- Minimum 70% in BE, XII & X
- Sound Digital Design fundamentals & knowledge of microprocessors is essential
- Knowledge of Verilog, C/C++ and OO concepts is preferred

Job Location : Delhi
http://www.ChetanaS.org
Desired Experience : 0-1 Years

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